1. Field of the Invention
The present invention relates to a method and apparatus for driving plasma display panels (PDPs) used in television receivers or computer monitors to display a picture, and more particularly, to a method and apparatus for driving PDPs that can realize reset stabilization.
2. Description of the Related Art
FIG. 1 is a partial perspective view of an AC type PDP. As shown in FIG. 1, pairs of a scan electrode 4 and a sustain electrode 5 are formed to be parallel to one another on a first glass substrate 1 and are covered with a dielectric layer 2 and a protective layer 3. A plurality of address electrodes 8 are formed on a second glass substrate 6 and are covered with an insulator layer 7. A plurality of barrier ribs 9 are formed on the insulator layer 7 to be parallel to and between the address electrodes 8. A fluorescent layer 10 is formed on the surface of the insulator layer 7 and the sidewalls of the barrier ribs 9. The first and second glass substrates 1 and 6 are disposed to face each other with a discharge space 11 therebetween so that the scan electrodes 4 and the sustain electrodes 5 are orthogonal to the address electrodes 8. The discharge space 11 at each intersection between an address electrode 8 and a pair of a scan electrode 4 and a sustain electrode 5 forms a discharge cell 12.
FIG. 2 shows an electrode array in a panel. The electrodes form a matrix having m columns and n rows. Address electrodes A1 through Am are arranged in columns, and scan electrodes SCN1 through SCNn, and sustain electrodes SUS1 through SUSn, are arranged in rows. A discharge cell indicated by the hatched rectangle in FIG. 2 corresponds to the discharge cell 12 of FIG. 1.
FIG. 3 is a general timing diagram for driving a panel. In this driving method, one frame period consists of 8 subfields for 256 gray scales. Each subfield consists of a reset period, an address period, and a sustain period.
In general, the panel driving timing is divided into a reset (initialization) period, an address period, and a sustain period. For the reset period, the charge state in each cell is initialized so as to smoothly perform an addressing operation in each cell. For the address period, cells to be turned on and cells not to be turned on in a panel are selected by scan pulses sequentially applied to the scan electrodes and address pulses applied to the address electrodes. Thereafter, the address discharging is carried out on the cells to be turned on to accumulate wall charges therein. For the sustain period, sustain discharging is performed on the cells, which are addressed by the address discharging, by applying sustain discharge pulses alternately to the scan and sustain electrodes, to display a picture. Also for the reset period, negative wall charges are accumulated on the surface of the protective layer covering the scan electrodes, and positive wall charges are accumulated on the surface of the insulator layer covering the address electrodes and on the surface of the protective layer covering the sustain electrodes. The amount of wall charges accumulated on each electrode is adjusted to be suitable for addressing in the addressing period.
One frame of a panel corresponds to a time of 16.67 msec ranging from the reset period of the first subfield to the sustain period of the last subfield. After one frame passes, the reset period of the first subfield of a next frame is started. After a sustain operation in the last subfield of the current frame and before a reset operation in the first subfield of the next frame, a rest period exists. If the rest period is too long, a reset discharge operation in the reset period of the first subfield of the next frame is affected. Therefore, a short rest period is advantageous to ensure reset stabilization in a next frame.
In a conventional method of driving a panel, during the rest period between the sustain period of a preceding subfield and the reset period of the following subfield, cell discharging does not occur so that a priming effect is considerably reduced. Accordingly, the reset operation in the following subfield is performed with the reduced priming effect so that the reset discharge can not be performed smoothly.
To solve the above-described problem, it is an object of the present invention to provide a method and apparatus for driving a plasma display panel (PDP) by which reset stabilization can be achieved even when there is a rest period before a reset period in driving the PDP.
To achieve the object of the present invention, there is provided a method for driving a PDP in which successive field periods, each including a reset period for initializing the state of respective cells, an address period for selectively discriminating cells to be turned on from cells not to be turned on and for performing an addressing operation, and a sustain period for discharging the addressed cells are performed, and a reset stabilization period for inducing discharging in a discharge space between cells is additionally performed before the reset period if a rest period having a predetermined time duration is present between the sustain period of a preceding field and the reset period of the field.
In one embodiment, the present invention provides a method of driving a PDP for displaying a picture by causing discharging in a discharge space between electrodes, in which if there is a time interval during which no discharging occurs in the discharge space before a reset period, a reset stabilization period is additionally performed before the reset period by applying a predetermined voltage to the electrodes to cause discharging between the electrodes.
In another embodiment, the present invention provides a method of driving a PDP in which successive field periods, each including a reset period for initializing the state of respective cells, an address period for selectively discriminating cells to be turned on from cells not to be turned on and for performing an addressing operation, and a sustain period for discharging the addressed cells are performed, and a rest period in which no discharge in cells occurs for a predetermined of time is positioned between the reset period and the address period, between the address period and the sustain period, or in the middle of the sustain period.
To achieve the object of the present invention, there is also provided a PDP driving apparatus comprising: a reset signal generator for generating a reset signal initializing the state of respective cells; an address signal generator for generating an address signal for selectively discriminating cells to be turned on from cells to be turned off and for performing an addressing operation; and a sustain signal generator for generating a sustain signal discharging the cells addressed by the address signal generator, wherein if cell discharging does not occur for a predetermined time interval before application of the reset signal, the reset signal generator generates a reset stabilization signal to cause discharging to occur in the cells prior to the generation of the reset signal.